SDC-based Resource Constrained Scheduling for Quantum Control Architectures Razvan Nane

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SDC-based Resource Constrained Scheduling for

Quantum Control Architectures

R˘

azvan Nane

Big Data Accelerate B.V.

Delft, The Netherlands

razvan.nane@bigdataccelerate.com

ABSTRACT

Instruction scheduling is a key transformation in backend

compilers that take an untimed description of an algorithm

and assigns time slots to the algorithm’s instructions so that

they can be executed as eﬃciently as possible while tak-

ing into account the target processor limitations, such as

the amount of computational units available. For exam-

ple, for a superconducting quantum processor these restric-

tions include the amount of analogue instruments available

to play the waveforms to drive the qubit rotations or on-chip

connectivity between qubits. Current small-scale quantum

processors contain only a few qubits; therefore, it is feasi-

ble to drive qubits individually albeit not scalable. Conse-

quently, for NISQ and beyond NISQ devices, it is expected

that classical instrument sharing to be designed in the future

quantum control architectures where several qubits are con-

nected to an instrument and multiplexing is used to activate

only the qubits performing the same quantum operation at

a time. Existing quantum scheduling algorithms either rely

on ILP formulations, which do not scale well, or use heuris-

tic based algorithms such as list scheduling which are not

versatile enough to deal with quantum requirements such

as scheduling with exact relative timing constraints between

instructions, situation that might occur when decomposing

complex instructions into native ones and requiring to keep a

ﬁxed timing between the primitive ones to guarantee correct-

ness. In this paper, we propose a novel resource constrained

scheduling algorithm that is based on the SDC formulation,

which is the state-of-the-art algorithm used in the reconﬁg-

urable computing. We evaluate it against a list scheduler

and describe the beneﬁts of the proposed approach. We ﬁnd

that the SDC-based scheduling is not only able to ﬁnd better

schedules, with an improvement of 10% on average, but it

is also more versatile being able to model the complex rela-

tive timing constraints required for quantum circuit resource

constrained scheduling.

1. INTRODUCTION

Quantum technology promises to boost the computing ca-

pabilities available today by orders of magnitude, which will

revolutionize key application domains and give birth to new

ones that will drive the human evolution for decades to come.

However, because of the novelty of the computing approach

that completely diﬀers from any existing classical comput-

ing technology, we require a holistic research and develop-

ment agenda in which everything from the lowest physical

level, the qubit, to the highest application level needs to be

(re)invented. A key component in the quantum full stack is

the (backend) compiler. The main objective of a compiler is

to eﬃciently translate a quantum high-level algorithm into

an optimal quantum circuit that can be executed correctly

on a quantum chip. For example, quantum circuits, which

are composed of a series of quantum operations called gates,

require scheduling to ensure all the gates of the quantum

algorithm and their dependencies are satisﬁed while mak-

ing sure that the resource limitations of the target quantum

chip are taken into consideration. Moreover, in the context

of quantum compilation, where short decoherence times are

an additional burden [1], the availability of a performant

scheduling algorithm can be the diﬀerence between a cor-

rectly executing quantum algorithm and a completely use-

less circuit.

At the same time, the number of qubits available in cur-

rent quantum processors is low (at the moment of publica-

tion the largest device is IBM Eagle [2] with 127 qubits),

which implies that qubits can be driven individually and

independently of other qubits because in these early quan-

tum computing chips the quantum control electronics are

not shared. Nevertheless, this simplistic approach is not

realistic for scalable quantum computing systems starting

with several hundreds to thousands of qubits, such as the

IBM System Two quantum architecture [3], that will re-

quire multiplexing qubit control wires. Consequently, devel-

oping resource constrained scheduling algorithms is key to

the success of these future architectures. However, existing

approaches for current quantum computing deal with the

scheduling problem in a trivial manner by mostly ignoring

architectural limitations and resort to scheduling the quan-

tum algorithm in an as soon as possible (ASAP) style, where

only the program dependencies are taken into consideration.

One of the few compiler frameworks for quantum compu-

tation that addresses the limitations mentioned above is

OpenQL [4], which includes a backend list scheduling com-

piler pass [5] for the Surface-17 superconducting quantum

processor [6]. However, the problem with using list schedul-

ing in a quantum compiler backed is that it is not versatile

enough to model quantum gate decomposition [7] and sat-

isfy the relative timings ﬁner quantum operations should

obey with respect to one another after decomposition, e.g.,

performing a ﬂux operation while at the same time park-

ing other qubits, or ensuring ﬁxed timing that might be

required for feedback control or error detection and correc-

tion. The alternative to use a fully speciﬁed integer linear

programming (ILP) formulation would solve the above ver-

arXiv:2210.00794v1 [quant-ph] 3 Oct 2022

satility problem, albeit not being scalable. Consequently, a

scheduling algorithm that provides a balanced trade-oﬀ be-

tween versatility and scalability was proposed. This schedul-

ing algorithm is based on a system of diﬀerence constraints

(SDC) [8] formulation stemming from ILP and is the state-

of-the-art in high-level synthesis compilers [9] used in clas-

sical reconﬁgurable computing. However, SDC scheduling

with resource constraints in a quantum context is not opti-

mal due to the way quantum resources are shared, i.e., one

quantum instrument can perform multiple quantum gates of

the same type at once similar to classical vector processing

units.

In this paper, we propose a novel quantum resource con-

straint scheduling algorithm based on SDC (QSDC) to gen-

erate eﬃcient quantum schedules when quantum resources

are shared. Concretely, the novelties of this paper are:

•We develop a novel resource constraint scheduling al-

gorithm based on the SDC formulation and integrate

it into the OpenQL compiler framework.

•We provide a comprehensive analysis of the advantages

of our proposed algorithm when compared with the

current list scheduling algorithm available in OpenQL.

The paper is organized as follows. First, section 2 presents

the necessary background, including SDC preliminaries and

related works. Then, in section 3 we present the QSDC algo-

rithm. Section 4 describes the experimental results. Finally,

section 5 summarizes the paper and highlights future work.

2. BACKGROUND

In this section, we introduce ﬁrst the underlying concepts

of quantum computation, then we present the instruction

scheduling problem based on the system of diﬀerence con-

straints formulation, and ﬁnally, we review the scheduling

state-of-the-art for quantum compilers.

2.1 Quantum Computing and Resources

Quantum computing requires a radically novel approach to

the developing of processors and compilers, the hardware

and software building blocks of any computing system. The

main reason for the requirement of new processor design

techniques and novel compiler algorithms is due to the switch

to implementing quantum mechanics operations rather than

the classical approach of performing Boolean logic arith-

metic. While processing units enabling Boolean logic op-

erations can be implemented fully in the digital domain by

mature EDA techniques using large-scale integrated circuits,

quantum mechanics requires the integration of analogue in-

struments that drive the basic quantum computational unit,

the qubit, by generating waveforms to instruct which quan-

tum gate has to be performed on a qubit. Table 1 summa-

rizes the diﬀerences between the classical and quantum ba-

sic computational concepts and processor micro-architecture

functional units.

The major diﬀerence stems from the requirement to im-

plement quantum mechanics that requires driving analogue

devices, e.g., an Arbitrary Waveform Generator (AWG) to

play diﬀerent waveforms corresponding to particular quan-

tum gates (e.g., an X gate, as opposed to an arithmetic

operation performed by an Arithmetic-Logic Unig (ALU)

Table 1: Comparison of Classical vs. Quantum Computing

Compute Concept Classical Quantum

Basic Compute Element bit qubit

Logic Type arith/boolean quantum mechanics

Logic Operations +,-,*,|,& X, H, CNOT

Micro Architecture only digital digital & analogue

enabled by an CU+ALU CU+AWG

Figure 1: Qutech Surface-17 (S-17) Quantum Processor.

Figure edited from [6].

in a classical processor) controlled by general-purpose Con-

trol Units (CUs) that keep track of which quantum gates

have to be performed at a given time step according to the

quantum algorithm. Consequently, due to the digital-analog

domain crossing required in the design of a quantum proces-

sor micro-architectures, the sharing of AWGs is key to the

success of developing scalable quantum computing systems.

For example, Figure 1 shows the Surface-17 ”schematic of

the targeted realization of Surface-17 in a planar cQED ar-

chitecture with vertical I/O. Every transmon (represented

by a circle) has dedicated ﬂux control line, microwave-drive

line, and readout resonator. Dedicated bus resonators me-

diate interactions between nearest-neighbor data and ancilla

qubits. Readout resonators are simultaneously interrogated

using frequency-division multiplexing in diagonally-running

feedlines [6]. In the current S-17 conﬁguration, qubits col-

ored the same are connected to the same microwave-drive

line and controlled by the same AWG instrument. For ex-

ample, qubits 8, 9, and 10 are driven by a single AWG.

In this work, we use this target processor with the instru-

ment connections depicted in Figure 1. However, the work

can be easily retartgeted by modifying the instrument sec-

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SDC-basedResourceConstrainedSchedulingforQuantumControlArchitecturesRazvanNaneBigDataAccelerateB.V.Delft,TheNetherlandsrazvan.nane@bigdataccelerate.comABSTRACTInstructionschedulingisakeytransformationinbackendcompilersthattakeanuntimeddescriptionofanalgorithmandassignstimeslotstothealgorithm'sinstr...

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SDC-based Resource Constrained Scheduling for Quantum Control Architectures Razvan Nane

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