A Compact Model of Interf ace-Type Memristors linking physical and device properties A Preprint

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A Compact Model of Interface-Type Memristors

linking physical and device properties

A Preprint

T. F. Tiotto1,2, A. S. Goossens1,3, A. E. Dima2, C. Yakopcic4, T. Banerjee1,3, J. P. Borst1,2, and N. A.

Taatgen1,2

1Groningen Cognitive Systems and Materials Center, University of Groningen, Groningen, The Netherlands

2Bernoulli Institute, University of Groningen, Groningen, The Netherlands

3Zernike Institute for Advanced Materials, University of Groningen, Groningen, The Netherlands

4Department of Electrical and Computer Engineering, University of Dayton, Dayton, OH, USA

{t.f.tiotto,a.s.goossens,t.banerjee,j.p.borst,n.a.taatgen}@rug.nl,

cyakopcic1@udayton.edu

September, 2022

Abstract

Memristors are an electronic device whose resistance depends on the voltage history that has

been applied to its two terminals. Despite its clear advantage as a computational element,

a suitable transport model is lacking for the special class of interface-based memristors.

Here, we adapt the widely-used Yakopcic compact model by including transport equations

relevant to interface-type memristors. This model is able to reproduce the qualitative be-

haviour measured upon Nb-doped SrTiOmemristive devices. Our analysis demonstrates

a direct correlation between the devices’ characteristic parameters and those of our model.

The model can clearly identify the charge transport mechanism in dierent resistive states

thus facilitating evaluation of the relevant parameters pertaining to resistive switching in

interface-based memristors. One clear application of our study is its ability to inform the

design and fabrication of related memristive devices.

1 Introduction

One of the greatest challenges faced in the future of computation is in how to extract information from and

act upon the ever-increasing quantity of data generated. On one end of the spectrum, the amount of big

data being produced is constantly increasing [1] while, on the other, low-power autonomous decision-making

is becoming increasingly important in edge computing applications. Creating truly intelligent systems with

brain-like functionality has so far been beyond our present-day capabilities; doing so in an energy-ecient

manner will be another monumental challenge.

The limitations we face in matching a brain’s performance across a variety of tasks stem not only from

an algorithmic shortcoming, but also from the comparatively low energy eciency of our systems. Even

our best supercomputers cannot solve many tasks that are natural for us [2]. Nearly all computers are built

within the von Neumann framework, which enforces a strict physical and functional division between memory

and computation; in most cases this leads to the connection becoming a bottleneck for overall performance,

because of the data transfer back and forth during a computation. Given that data creation is accelerating

faster than computational capabilities, the von Neumann bottleneck is set to become an ever-greater limiting

factor. Relinquishing the von Neumann framework in favour of newer paradigms as neuromorphic computing

[3] could pave a way to address both the algorithmic limitations that make our computers unable to be truly

intelligent [2] and at the same time enable us to start improving their energy eciency.

Model of Interface-type Memristors

One of the most promising emerging technologies that can be used in starting to emulate the brain is

a class of electronic device know as memristor. Memristive devices can switch their electrical resistance

between two or more levels through the application of external stimuli. They are typically composed of

a metal/insulator/metal (MIM) stack which in which microscopic changes occur when an electrical bias is

applied across it, resulting in a macroscopic change in resistance. The existence of multilevel conductance

states, together with low switching speeds and energy requirements, enables memristors to be used as a

remarkably ecient computational substrate which could quite naturally support brain-inspired algorithms

and approaches. Memristors can enable the co-location of memory and computation when used to implement

synaptic weights in a non-Von Neumann architecture [4].

Dierent memristive mechanisms are possible depending on the material composition of the MIM cell with

phase-change (PCM), lament formation and rupture (ReRAM), magnetic (MRAM), and ferroelectric pro-

cesses being the most technologically advanced. Interface-type memristors, where electric eld controlled

resistive switching results from changes occurring at interfaces, are a lesser studied class of memristors

but oers distinct advantage for integration in an architecture. Filamentary memristors typically require

forming processes before they can be used, which is typically unfavourable for device performance and in-

tegration [5, 6]; an attractive feature of interface memristors is that switching behaviour is present in the

as-fabricated device. Additionally, they also show reproducible and gradual multi-level resistive switching

at room temperature.

It has previously been shown that metal/Nb-doped SrTiO(Nb:STO) devices exhibit resistance dynamics in

response to repeated voltage pulses describable by a simple power-law of the form 

[7]. Given that this resistance follows an exponential trajectory, the rate of change slows as its bounds 

are approached; such a soft-bounded device can be productively used to model synapses in an ANN while

solving life-long learning and catastrophic forgetting issues [8]. While linear synaptic weight changes are often

considered ideal, they lead to a response that is either hard-bounded or unbounded; in the continual-learning

setting that all biological cognitive systems operate in, this would actually be a disadvantage as it would lead

to hindered performance and memory capacity limitations [9]. The resistive switching in Nb:STO Schottky

junctions has been documented in literature[10–14] but so far there have been no models that capture the

hysteretic current-voltage response.

Large-scale application of memristors is still in its infancy [15] but, like any other component used in

computer-aided integrated circuit design, it is paramount to have reliable models of the devices’ electri-

cal behaviour, which enable simulation and prediction of the behaviour of both individual memristors as

well of the whole integrated circuit. Consequently, a great deal of eort has gone into modelling of the

hysteresis curves of these types of memristors: PCM [16–18], ReRAM [19–23], MRAM [24–27], and ferro-

electric [28–31]. The Yakopcic model is a generalised, compact representation of the I-V characteristics of

a memristor with its core assumption being that a memristor can be represented as two resistors in series,

with an internal state variable mixing between the two.

Here we extend the widely-used Yakopcic generalised memristor model [32] to incorporate the often neglected

charge transport through metal/insulator interfaces, which is especially important to model systems where

the resistive switching occurs at the interface. While the Yakopcic model has been successfully applied to

reproducing the electrical behaviour of many memristive devices [33–40], it has not been used to replicate

interface-type memristors as the Nb-doped SrTiOdevice we select in this work.

In order to derive a functional description of the resistive switching in interface memristors we modify the

electron transmission equations in the Yakopcic model to more closely align with the physical mechanisms

relevant for charge transport through Schottky junctions in our Nb:STO device. By tting this physically-

informed compact model to data obtained from real devices fabricated at dierent sizes we show clear trends

in the model parameters, which match the variations expected by our understanding of the underlying phys-

ical mechanisms. Given the generality of the model, it could be applied to other interface-type memristors

in order to provide insight into their charge transport parameters and help uncover unaccounted physical

mechanisms.

2 Methods

2.1 System Modelled

To model a memristive system, we rst have to take account of the relevant underlying transport and switch-

ing mechanisms. An important consideration that calls for attention and is often neglected is the role of

Model of Interface-type Memristors

Figure 1: (a) Schematic representation of devices used for obtaining experimental data. (b) Device structure

assumed for modelling, highlighting the interface between the cobalt electrode and the insulating Nb:STO

layer. (c) Voltage sweeping sequence used to obtain I-V data. The sweep can be split into four parts by

considering the polarity (forward bias,  , or reverse bias,  ) and the resistance state (LRS , or

HRS ).

the metal/insulator interfaces. It can be expected that Schottky barriers form at these interfaces due to

the signicantly dierent electronic properties of the contacting materials, which can have a considerable

inuence on the overall device characteristics. A complete physical device model should include these inter-

faces to describe the full system. The contact resistance between a metal electrode and oxide is controlled

by a space-charge region which forms due to the dierences in the Fermi levels of the contacting materials.

Typically a Schottky barrier forms at a metal/insulator or metal/semiconductor interface, giving rise to

a high contact resistance due to the formation of a space-charge (or depletion) layer in which the mobile

carriers are depleted.

The eect of such an interface becomes especially important when considering material systems where inter-

face eects play the dominant role in mediating the resistive switching mechanism. This class of memristive

devices consist of Schottky interfaces that form between doped wide-band gap oxide, such as SrTiO, and

high work-function metals. These devices show hysteretic current-voltage characteristics with bipolar switch-

ing and large resistance windows together with continuously alterable resistance states. They do not require

an initial forming step, as is typically the case for lamentary memristors, which is a signicant advantage

for practical applications. Both the SET and RESET transitions are gradual and highly modiable enabling

analogue switching between dierent states within a window. This distinguishes them from the more ad-

vanced resistive switching devices such as phase-change materials, in which the RESET operation is abrupt

and lamentary memristors which tend to have abrupt SET transitions.

Charge transport is controlled by the Schottky interface and resistive switching is accompanied by changes

in the eective Schottky barrier height and width. This is mediated by processes that occur when an electric

eld is applied: (i) the movement of ionic species, such as oxygen vacancies, and/or (ii) the trapping of

electronic charges. In Nb:STO, for example, oxygen vacancy migration under applied electric elds has been

observed to be an important factor in mediating the resistive switching [41].

There are various ways in which electrons can be transported across a Schottky interface under bias. Here

we consider two of the most important mechanisms which are thermionic emission of electrons over the top

of the barrier and quantum-mechanical tunnelling through the barrier. In ideal diodes thermionic emission

is the dominant mechanism and this tends to be the most important process in forward bias; in reverse bias,

however, tunnelling is expected to strongly contribute to the ow of charge.

There are a vast number of mechanisms through which electrons can traverse the barrier by tunnelling. Some

of the widely considered ones include direct tunnelling - which is possible if the barrier is suciently thin

- or - when the barrier is thicker - through thinner regions of the barrier, for example at higher energies

(Fowler-Nordheim) or through defect states (Poole-Frenkel). The relation between the current and voltage

depends strongly on system-specic mechanism(s). In this work we consider the theory proposed by Simmons

describing the current ow through a generalised barrier [42]. This model approximates tunnelling current

through an arbitrary barrier shape by way of a hyperbolic sinusoid function and is hence more widely

applicable as it does not assume one specic mechanism.

Here we focus on the interface between Co (work function eV) and Nb:STO (0.1 wt) (see gure 1(b)). STO

is an insulator that becomes an n-type semiconductor when doped with Nb. When Nb:STO is contacted

to a metal with a high work function, a Schottky barrier forms at the interface. It has been found that

while this doping concentration has no signicant eect on the bulk structure and does not induce oxygen

Model of Interface-type Memristors

vacancies throughout the single-crystalline substrate, it is suciently large to make the Nb:STO degenerate.

This ensures that the resistance of the semiconductor is relatively low and the Schottky interface contributes

the most to the measured resistance.

2.2 Measurements

We obtained experimental results from circular cobalt (Co) electrodes of dierent areas, contacted to an

Nb:STO single crystalline substrate with a doping density of 0.1 wt. The Co contacts were fabricated

using a two-step electron beam lithography process using aluminium oxide as an insulation layer to dene

the contact areas and to prevent electronic cross talk. The bottom of the substrate serves as a back contact

for the devices. A device schematic highlighting the dierent contact areas is shown in gure 1(a).

Two-probe DC voltage sweeps (VVVV) were done from the virgin state; the voltage sweep

is shown in gure 1(c). For this study, we measured devices of three dierent areas and radial dimensions

of: µm, µm, and µm. To incorporate device-to-device variation, we obtained results from several

devices of each area; the results from individual devices are shown in supplementary gure S1.

2.3 Yakopcic Generalised Memristor Model

One model which has seen widespread use is the Yakopcic memristor model [32], which is a generalised,

compact mathematical representation of the relationship that exists between input voltage (V) and mea-

sured output current (I) in a memristor. The model follows in the steps of [19], in that its fundamental

representation of the memristor is as two resistors in series: one with low resistance and the other of

high resistance . As in [43], this model has been generalised [44] so that the resistors are actually elec-

tron transmission equations , making the current a non-linear function of the voltage. Given that a

memristor’s resistance is analogue and programmable, the two electron transmission equations are weighted

and mixed by a dynamic internal state variable , as proposed by [45]. The internal state variable

encapsulates a set of physical variables that inuence the material’s resistance. Given the known importance

of oxygen vacancies, we consider the movement of these ions to be the most relevant internal state. Hence,

we model the change in as non-linear ion motion. Consequently, the I-V curve describing the characteristic

relationship between output and input of the device is given by:

 (1)

with modelling the behaviour in the low-resistance state (LRS) and in the high-resistance state (HRS).

The dynamics of the internal state variable are based on two functions (Eq. 2) and  (Eq.

3); the former implements the threshold voltage eect by virtue of which does not change when the voltage

drop is suciently small, while the latter models the non-linearity of ion motion whereby the change is

slowed when approaching its boundaries:









  

  

 

(2)

 

 

 

 

(3)

 



 



(4)

Finally, the state variable dynamics are modelled by integrating the ordinary dierential equation (ODE):



  (5)

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ACompactModelofInterface-TypeMemristorslinkingphysicalanddevicepropertiesAPreprintT.F.Tiotto1,2,A.S.Goossens1,3,A.E.Dima2,C.Yakopcic4,T.Banerjee1,3,J.P.Borst1,2,andN.A.Taatgen1,21GroningenCognitiveSystemsandMaterialsCenter,UniversityofGroningen,Groningen,TheNetherlands2BernoulliInstitute,Universityo...

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