Tunable quantum dots from atomically precise graphene nanoribbons using a multi-gate architecture

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Tunable quantum dots from atomically precise
graphene nanoribbons using a multi-gate
architecture
Jian Zhang,,,‡‡ Oliver Braun,,,‡‡ Gabriela Borin Barin,Sara Sangtarash,§Jan Overbeck,,k
Rimah Darawish,,Michael Stiefel,Roman Furrer,Antonis Olziersky,#Klaus M¨ullen,@Ivan
Shorubalko,Abdalghani H.S. Daaoub,§Pascal Ruffieux,Roman Fasel,,4Hatef Sadeghi,,§
Mickael L. Perrin,,,and Michel Calame,,k,††
Transport at Nanoscale Interfaces Laboratory, Empa, Swiss Federal Laboratories for Materials Science and
Technology, 8600 D¨ubendorf, Switzerland
Department of Physics, University of Basel, 4056 Basel, Switzerland
nanotech@surfaces Laboratory, Empa, Swiss Federal Laboratories for Materials Science and Technology,
8600 D¨ubendorf, Switzerland
§School of Engineering, University of Warwick, Coventry CV4 7AL, United Kingdom
kDepartment of Physics, University of Basel, 4056 Basel, Switzerland
Department of Chemistry and Biochemistry, University of Bern, 3012 Bern, Switzerland
#IBM Research - Zurich, 8803 R¨uschlikon, Switzerland
@Max Planck Institute for Polymer Research, 55128 Mainz, Germany
4Department of Chemistry, Biochemistry and Pharmaceutical Sciences, University of Bern, 3012 Bern,
Switzerland
Department of Information Technology and Electrical Engineering, ETH Zurich, 8092 Zurich, Switzerland
††Swiss Nanoscience Institute, University of Basel, 4056 Basel, Switzerland
‡‡These authors contributed equally to this work.
E-mail: jian.zhang@empa.ch; Hatef.Sadeghi@warwick.ac.uk; mickael.perrin@empa.ch;
michel.calame@empa.ch
1
arXiv:2210.03366v2 [cond-mat.mes-hall] 27 Oct 2022
Abstract
Atomically precise graphene nanoribbons (GNRs) are increasingly attracting in-
terest due to their largely modifiable electronic properties, which can be tailored
by controlling their width and edge structure during chemical synthesis. In re-
cent years, the exploitation of GNR properties for electronic devices has focused
on GNR integration into field-effect-transistor (FET) geometries. However, such
FET devices have limited electrostatic tunability due to the presence of a sin-
gle gate. Here, we report on the device integration of 9-atom wide armchair
graphene nanoribbons (9-AGNRs) into a multi-gate FET geometry, consisting of
an ultra-narrow finger gate and two side gates. We use high-resolution electron-
beam lithography (EBL) for defining finger gates as narrow as 12 nm and com-
bine them with graphene electrodes for contacting the GNRs. Low-temperature
transport spectroscopy measurements reveal quantum dot (QD) behavior with
rich Coulomb diamond patterns, suggesting that the GNRs form QDs that are
connected both in series and in parallel. Moreover, we show that the additional
gates enable differential tuning of the QDs in the nanojunction, providing the
first step towards multi-gate control of GNR-based multi-dot systems.
Bottom-up synthesized GNRs have attracted considerable interest as possible future elec-
tronic building blocks. This is mainly due to the fact their chemical structure can be con-
trolled with atomic precision, a property that top-down etched GNRs lack.1–3 Bottom-up
synthesized GNRs can, therefore, be regarded as a designer quantum material, where the
material properties can be designed by selecting the appropriate chemical precursors and
synthetic routes4–17. As such, one can largely tune their bandgap,18,19 form pn-junctions
within a single, heterogeneous ribbon,6tailor spin-polarized states7,20 and even topologi-
cally non-trivial phases.8–10,16,21 Exploiting these properties in electronic devices requires
contacting strategies that preserve the integrity of the GNRs, while at the same time allow-
2
ing for charge carriers to flow through. Moreover, many technological applications require
electrostatic control over the level structure of the GNRs. For example, field-effect transis-
tors require the presence of a single gate electrode to tune the channel to conductance, while
multiple gate electrodes are needed for the realization of qubits.
Several prototypical GNR devices have been studied to date10,22–28, exhibiting various
charge-transport characteristics, such as high-performance field-effect transistors operating
at room temperature22, gate-tunable QDs at low temperature10,25 and temperature-activated
transport through micron-sized films26,28. However, many challenges remain in the device
integration of these materials. On the one hand, the contacts need to be improved further29,
as well as the transfer process from the growth substrate to the devices substrate which can
lead to defects, impurities, and adsorbates at the interface between GNRs and the electrode
material. On the other hand, advanced gating strategies, such as ultrashort transistors30,31 or
multi-gate architectures, are highly desirable for devices that require additional control over
the electrostatic landscape of the device. To date, due the nanoscale size of the GNRs, only
field-effect-transistor devices have been realized10,22–28. More advanced device architectures
with multiple gates that are individually addressed require a very high control over the
fabrication of the multiple gates, the electrodes, and the alignment between them.
Here, we report on the integration of GNRs into a multi-gate field-effect transistor with
graphene electrodes. Our device design consists of a narrow finger gate and two additional
side gates. This geometry improves gating capabilities by allowing for the generation of an
asymmetric gate field using the side gates. As such, the different sides of the nanogaps experi-
ence a different gate field, providing additional control over the electrostatic landscape of the
junction. The narrow gate is 10 nm in length, with an effective channel length of <15 nm,
and is fabricated using CMOS-compatible processing steps. The graphene electrodes are
created using EBL, which has a major advantage of the control of the nanogap position27
and a proper alignment with the underlying gates. This is in contrast to electrodes created
using the electric breakdown procedure that has been commonly used for graphene.10,25,32
3
Moreover, our fabrication protocol allows for the integration of the GNRs at the very last
stage of device fabrication. Similar approaches with the integration of the sensitive material
in the final step have been shown to lead to major improvements in the device performance,
as demonstrated for example for MoS2.33–35 The design of the devices is supported by finite-
element calculations for optimizing the various geometrical parameters and maximizing the
effective electrostatic potential at the GNRs. Furthermore, low-temperature transport spec-
troscopy measurements reveal quantum dot (QD) behavior with addition energies in the
range of 20-150 meV, and transport characteristics that are tunable using the two side gates.
Our observations are supported by simple model calculations that highlight the importance
of the asymmetric gate field in the junction area.
Results
Devices design and fabrication
A schematic of the proposed device architecture is shown in Figure 1a. The finger-gate
(FG) with nanometer-scale dimensions is fine-patterned under the 9-AGNRs junction, while
two side-gates (SG1 and SG2) are defined under the source and drain graphene electrodes,
respectively. As the electronic coupling between the GNRs and the graphene is weak, we
anticipate the formation of quantum dots (QD) at low temperatures.10,25 The side gates
(SG1 or SG2), as they are located close to the nanojunction, are employed to introduce
an asymmetric electric gate field that will couple to the QD. We note that the interplay
between the gate length, gate separation, gate oxide thickness and the applied potentials is
very delicate to optimize to achieve a homogeneous electrostatic potential over the complete
channel length. Thinner oxides lead to higher gate coupling but also lower breakdown
voltages between the various gates. Moreover, reducing the distance between the gates also
increases the screening of the gate potential by the neighboring gates. To investigate this
balance, we performed finite-element calculations using Comsol Multiphysics. In Section 1
4
of the Supporting Information, we present the effective potential at the GNRs for various
thicknesses of the Al2O3and the gate separation. Graphene is modeled as a surface charge
density; its value is calculated using the voltage applied on the gate located below the
respective electrode, and the sum of quantum capacitance and geometric capacitance.
We show that thinner oxides down to 12 nm are generally more beneficial. A further
result is that reducing the FG-SG separation is beneficial, but only down to 10 nm. Beyond
that point, the field exceeds 1 V/nm, a strength where a breakdown of the oxide is likely to
happen.36
The starting point of the sample fabrication is a highly-doped silicon (Si) carrier chip with
a 285 nm thick silicon dioxide (SiO2), such that the Si substrate acts as a global back gate
(BG). The finger gates are patterned on top as follows. First an 8 nm platinum (Pt) film is
deposited using electron-beam evaporation. Then, a negative resist hydrogen silesquioxane
(HSQ) is spin-coated as a resist to define the etch mask. This resist turns into SiO2-like
after EBL exposure and development, leading to a highly-resistive etch mask. A subsequent
Ar+-ion milling step transfers the etch mask feature to the metal film, separating the finger
from the side gates. This process leads to very sharp features as it is not limited by grain
sizes or other edges effects which are common when using electron-beam evaporation with a
lift-off process. Our approach results in a finger gate with a length of 10-15 nm and a width
of 500 nm. The nanometer-scale dimension of the FG (< d) allows for creating an ultra-short
effective channel length while minimizing parasitic gate to source-drain capacitance. The 9-
AGNRs junction is electrically isolated from the metal gates using a 30 nm thick aluminum
oxide (Al2O3). The graphene electrodes are separated by a nanogap formed with high-
resolution patterning by using EBL, as reported elsewhere.27 Here, the electrode separation
dis set to be 15 nm, large enough to eliminate direct tunneling contributions between
the electrodes, but smaller than the average length of the 9-AGNRs.37 In Section 2 of the
Supporting Information, a more detailed description of the fabrication process is given.A
scanning electron micrograph (SEM) of the final device before GNR transfer is presented in
5
摘要:

Tunablequantumdotsfromatomicallyprecisegraphenenanoribbonsusingamulti-gatearchitectureJianZhang,,y,zzOliverBraun,y,z,zzGabrielaBorinBarin,{SaraSangtarash,xJanOverbeck,y,kRimahDarawish,{,?MichaelStiefel,yRomanFurrer,yAntonisOlziersky,#KlausMullen,@IvanShorubalko,yAbdalghaniH.S.Daaoub,xPascalRueux,...

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