Transformations for Accelerator-based Quantum Circuit Simulation in Haskell

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Transformations for Accelerator-based antum Circuit

Simulation in Haskell

YOUSSEF MOAWAD, University of Glasgow, UK

WIM VANDERBAUWHEDE, University of Glasgow, UK

RENÉ STEIJL, University of Glasgow, UK

For ecient hardware-accelerated simulations of quantum circuits, we can dene hardware-specic quantum-

circuit transformations. We use a functional programming approach to create a quantum-circuit analysis and

transformation method implemented in Haskell. This tool forms a key part of our larger quantum-computing

simulation toolchain. As an example of hardware acceleration, we discuss FPGA-based simulations of selected

quantum arithmetic circuits, including the transformation steps to optimise the hardware utilisation. Future

development steps in the Haskell-based analysis and transformation tool are outlined. The described toolchain

can be found on GitHub: https://github.com/DevdudeSami/fqt.

1 INTRODUCTION

Ecient simulation of quantum computers is essential for the development of quantum algorithms

and for further development of quantum hardware. Quantum computers promise to deliver up to

exponential complexity improvements for certain algorithms[16]; however, this is also where the

diculty in simulating them arises. The state of a coherent

𝑛

-qubit quantum register in a quantum

processor can be dened using 2

𝑛

complex numbers, also termed the quantum state vector. In

contrast to the register in a classical computer, the quantum state in a coherent qubit register is

in a state of superposition until quantum measurement operations are performed. Measurement

(partially) collapses the quantum state superposition, and the complex amplitudes dene the

likelihood of nding a given state after measurement. Quantum superposition is the key principle

creating the potential speed-up for most quantum algorithms.

The Quantum Circuit Model is the most common model for interacting with current quantum

hardware and reasoning about quantum algorithms. In this work, Qubit-Wise Multiplication (QWM)

is chosen as the baseline simulation method. While this requires the storage of the full state-vector,

𝑛

complex amplitudes, it does give the most control and allows full inspection of the state during

computation. To process one quantum gate in QWM, the entire state vector is updated. Data-locality

during these operations is not guaranteed, as pairs of amplitudes have to be accessed with strides

that grow exponentially depending on the target qubit. However, for each gate, due to the implied

quantum parallelism, these operations can be executed in parallel.

Classical simulations of quantum circuits are most commonly performed on multicore computers

and clusters[

]. A range of high-performance simulators exists. Typically, the quantum-circuit

implementation of quantum algorithms is represented by a Domain Specic Language (e.g. QASM).

Quantum computer simulations have also been performed on GPUs[

] and FPGAs[

The underlying idea of such hardware-accelerated simulations is to use the specic hardware

features to process the quantum circuit more eciently. In our ongoing research, we focus on

FPGAs (Field Programmable Gate Arrays) as accelerators. FPGAs are programmable circuits that

allow to construct highly parallel architectures that closely mimic the properties of quantum

computing. To allow us to investigate dierent architectures, we developed a quantum simulation

toolchain that includes a Quantum Circuit Analysis and Transformation tool. We target quantum

algorithms for computational science and engineering applications. In contrast to a signicant body

of work focusing on general and even randomized circuits, the present work aims to explicitly take

advantage of the quantum-circuit structure using the knowledge of the domain experts developing

arXiv:2210.12703v1 [quant-ph] 23 Oct 2022

Youssef Moawad, Wim Vanderbauwhede, and René Steijl

the algorithms. Specically, our work diers in scope and context from previous quantum computing

tool chains employing Functional Programming, e.g. Quipper and Microsoft’s Q# and Liquid.

The key contributions of this paper can be summarized as follows:

•Discussion of the design and implementation of our toolchain.

•

An implementation of an FPGA-based quantum circuit simulator embedded in our toolchain

and its embedded DSL

•

A new circuit optimisation technique based on the reduction of input and workspace qubits

for generating specialised circuits with fewer qubits, reducing the memory space required

for the full state-vector simulation approach;

2 SIMULATION OF QUANTUM CIRCUITS

2.1 CPU/GPU Simulation

Extensive research has resulted in a range of highly-optimized quantum computer simulators

for multi-core and distributed computing architectures. Intel Quantum Simulator (IQS, formerly

known as qHiPSTER) [

] is a quantum simulator optimised for multi-node systems. ProjectQ [

]

oers a modular compiler engine that can optimise at dierent levels of abstraction dened by

the user, and includes optimised tools for local simulation of circuits. JUMPIQCS [

] is a Fortran

90-based simulator that utilises MPI for distribution. Qrack [

] and QCGPU [

] are cross platform

OpenCL-based full state-vector simulators.

2.2 FPGA Simulation

The simulation of quantum computers and, specically, quantum-circuit implementations of algo-

rithms on FPGAs has been the topic of more recent research works. Examples of works focusing

on FPGAs include[11], [1], [3], [13], [14], [17], [15], [12], and [2].

2.3 Simulator architecture for FPGAs

Our main goals for developing an FPGA simulator for quantum circuits are: universality (ability

to simulate any theoretical gate), reuseability (a recompilation process should not be necessary

between dierent circuit runs), and scalability (we should be able to simulate any feasible number

of qubits without recompiling). We achieve universality by making sure the system has built-in

at least a universal set of quantum gates. Our current architecture (implemented in OpenCL and

tested with Intel’s AOCL compiler) stores the state vector in FPGA DRAM and compute kernels

corresponding to each quantum gate access the memory to perform the necessary computations.

Since in general each gate application needs to access the entire memory space, we perform gate

applications sequentially and attempt to optimise the performance of the application of a general

gate.

3 HASKELL TOOLCHAIN

Debugging complex quantum circuits at the level of our FPGA instruction set can be very tedious

and so several higher level languages exist for expressing quantum algorithms, including Quipper

[

], OpenQASM 3 [

], and Microsoft Q# [

]. We decided to include a custom eDSL with our toolchain

to maintain control and facilitate future development of architecture-specic optimisations in the

instruction set. However, implementing frontends for these already existing high-level languages

would allow for a tighter integration with the current ecosystem.

The main contribution of this work is the introduction of a Haskell-based toolchain and eDSL

for specifying and compiling quantum circuits for an FPGA-based architecture.

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TransformationsforAccelerator-basedQuantumCircuitSimulationinHaskellYOUSSEFMOAWAD,UniversityofGlasgow,UKWIMVANDERBAUWHEDE,UniversityofGlasgow,UKRENÉSTEIJL,UniversityofGlasgow,UKForefficienthardware-acceleratedsimulationsofquantumcircuits,wecandefinehardware-specificquantum-circuittransformations.Weu...

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